1. Technical Field
The present disclosure relates to a processor with multiple cores, in particular, to a network on chip (NoC) processor with multiple cores and a routing method thereof.
2. Description of Related Art
For implementing visual recongization, a neocortical computing (NC) processor is proposed. The NC processors using multiple algorithms and heterogeneous multi-core architecture to finish narrowly predefined recognition tasks have better performances than the other conventional processors.
However, for executing brain-mimicking visual recognition algorithms, several hundred Giga operations per second (GOPS) of dense and/or sparse matrix calculations are required, and an over 1.5 Tera bits per second (1.5 Tb/s) inter-stage data bandwidth is further required. In other words, the NC processor has the design challenges in computing enormous matrix operations and extremely frequent inter-stage communication.